Siemens EDA and TSMC Forge Deeper Alliance at 2025 OIP Forum to Redefine Chip Design and Accelerate AI Innovation
SANTA CLARA, CA – September 24, 2025 – Siemens Digital Industries Software has announced a significant expansion of its collaboration with Taiwan Semiconductor Manufacturing Company (TSMC), solidifying a strategic alliance aimed at accelerating innovation in advanced chip design. The news, revealed during the 2025 TSMC North America Open Innovation Platform® (OIP) Ecosystem Forum, highlights a joint commitment to empowering mutual customers with cutting-edge Electronic Design Automation (EDA) tools and solutions for TSMC’s most advanced process technologies.
This deepened partnership underscores the industry’s growing reliance on collaboration to tackle the escalating complexity of semiconductor development. As demand surges for sophisticated chips powering Artificial Intelligence (AI), High-Performance Computing (HPC), and an array of connected devices, Siemens EDA and TSMC are joining forces to streamline design flows, enhance performance, and reduce time-to-market. This recent news is a testament to their ongoing efforts to push the boundaries of semiconductor technology.
Advancing the Frontiers of AI and 3D IC Design
The expanded collaboration places a strong emphasis on AI-driven design methodologies and the intricate world of 3D Integrated Circuits (3D ICs). Siemens EDA’s advanced solutions are now certified for TSMC’s leading-edge process nodes, including N2P and A16, enabling designers to optimize power, performance, and area (PPA) for next-generation processors and System-on-Chips (SoCs). Specific initiatives include evaluating AI-driven Design Rule Check (DRC) productivity improvements using Siemens’ Calibre® Vision AI software, which demonstrably enhances debugging efficiency.
Furthermore, the partnership is making strides in 3D IC enablement. Siemens’ Calibre 3DSTACK™ and Calibre 3DThermal™ solutions are certified for TSMC’s 3D chip stacking flow, including its 3DFabric™ and TSMC Compact Universal Photonic Engine (COUPE™) technologies. This facilitates robust thermal-aware multi-die system design, a critical component for advanced packaging and heterogeneous integration.
Comprehensive Tool Certification for Leading-Edge Processes
A cornerstone of this collaboration is the extensive certification of Siemens EDA’s tool suite for TSMC’s most advanced manufacturing processes. Siemens’ Calibre® nmPlatform, a leading tool for IC verification, is now certified for TSMC’s N2P and A16 processes, encompassing nmDRC, nmLVS, PERC™, and YieldEnhancer™ software. This ensures that mutual customers can leverage state-of-the-art sign-off technology for their most demanding designs.
Beyond digital verification, the partnership also extends to analog and mixed-signal design. Siemens’ Solido™ Simulation Suite software has been validated for analog, RF, mixed-signal, and memory design workflows on TSMC’s advanced nodes, including N3C, N2P, and A16. The Solido™ Design Environment software, integrated into TSMC’s Custom Design Reference Flow (CDRF) for N2P, supports advanced variation-aware verification, enhancing design sensitivity and automated cell optimization. Siemens’ Analog FastSPICE (AFS) software is also certified for N2P and A16, offering powerful solutions for these complex designs.
Accelerating Time-to-Market and Enabling Cloud Workflows
The implications of this deepened collaboration are profound for accelerating the pace of innovation. By aligning Siemens’ EDA solutions with TSMC’s cutting-edge manufacturing processes, mutual customers can achieve faster design closure and significantly shorten their time-to-market for new products. This is particularly crucial in rapidly evolving sectors like AI and HPC, where speed to market can be a decisive competitive advantage.
In a move reflecting the evolving landscape of chip development, Siemens and TSMC have also successfully demonstrated EDA tools, including the Calibre® nmPlatform and Solido Simulation Suite, running on the AWS Cloud. This initiative highlights the growing adoption of cloud-based workflows, offering designers enhanced scalability, accessibility, and the potential for faster tape-outs, while maintaining tool accuracy and security.
Shaping the Future of Semiconductor Innovation
The expanded partnership between Siemens EDA and TSMC at the 2025 OIP Forum signifies a pivotal moment for the semiconductor industry. As the quest for more powerful, energy-efficient, and complex chips intensifies, this collaboration is set to play a crucial role in enabling the next wave of technological advancements. Industry leaders are optimistic that this alliance will continue to foster groundbreaking innovations, benefiting a wide range of applications from AI accelerators and HPC to automotive and IoT devices.
“Our longstanding relationship with TSMC underscores the transformative power of collaborative innovation,” stated Mike Ellow, CEO of Siemens EDA, Siemens Digital Industries Software. “By combining Siemens’ leading IC and advanced packaging solutions with TSMC’s state-of-the-art process technologies, we enable our mutual customers to achieve new levels of design innovation and faster time-to-market, reshaping the future of semiconductor development.”
TSMC echoed this sentiment, with Aveek Sarkar, Director of the Ecosystem and Alliance Management Division at TSMC, adding, “The collaboration with Siemens illustrates our persistent focus to enable our shared customers for the latest and most advanced process and packaging technologies. EDA solutions from our OIP partners have significantly contributed to advancing energy-efficient AI chip innovation, and TSMC will continue working with our ecosystem to enable the rapid proliferation of AI through collaborative efforts.”
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